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quad, 235 mhz, dc-coupled vga and differential output amplifier data sheet ad8264 rev. b document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2009C2016 analog devices, inc. all rights reserved. technical support www.analog.com features low noise voltage noise: 2.3 nv/hz current noise: 2 pa/hz wide bandwidth small signal: 235 mhz (vgax); 80 mhz (output amplifier) large signal: 80 mhz (1 v p-p) gain range 0 to 24 db (input to vga output) 6 to 30 db (input to differential output) gain scaling: 20 db/v dc-coupled single-ended input and differential output supplies: 2.5 v to 5 v low power: 140 mw per channel at 3.3 v applications multichannel data acquisition positron emission tomography gain trim industrial and medical ultrasound radar receivers general description the ad8264 is a quad, linear-in-db, general-purpose variable gain amplifier (vga) with a preamplifier (preamp), and a flexible differential output buffer. dc coupling, combined with wide bandwidth, makes this amplifier a very good pulse processor. each channel includes a single-ended input preamp/vga section to preserve the wide bandwidth and fast slew rate for low dis- tortion pulse applications. a 6 db differential output buffer with common-mode and offset adjustments enable direct coupling to most modern high speed analog-to-digital converters (adcs), using the converter reference output for perfect dc matching levels. the ?3 db bandwidth of the preamp/vga is dc to 235 mhz, and the bandwidth of the differential driver is 80 mhz. the floating gain control interface provides a precise linear-in-db scale of 20 db/v and is easy to interface to a variety of external circuits. the gain of each channel is adjusted independently, and all channels are referenced to a single pin, gnlo. combined with a multioutput, digital-to-analog converter (dac), each section of the ad8264 can be used for active calibration or as a trim amplifier. operation from a bipolar power supply enables amplification of negative voltage pulses generated by current-sinking pulses into a grounded load, such as is typical of photodiodes or photo- multiplier tubes (pmt). delay- free processing of wideband video signals is also possible. functional block diagram ippx vpos ipnx volx vohx interpolator preamp 6db (2) ofsx oppx gain interface 100 ? 747 ? 107 ? 100 ? + ? vocm comm gnhx gnlo bias vneg vgax one channel shown attenuator ?24db to 0db fixedgainvga amplifier 18db (8) differential output amplifier 6db (2) 1k ? 2k ? 1k? 2k ? 07736-001 figure 1.
ad8264 data sheet rev. b | page 2 of 40 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 6 ? thermal resistance ...................................................................... 6 ? maximum power dissipation ..................................................... 6 ? esd caution .................................................................................. 6 ? pin configuration and function descriptions ............................. 7 ? typical performance characteristics ............................................. 8 ? test circuits ..................................................................................... 20 ? theory of operation ...................................................................... 28 ? overview ..................................................................................... 28 ? preamp ......................................................................................... 28 ? vga ............................................................................................. 28 ? post amplifier ............................................................................. 29 ? noise ............................................................................................ 29 ? applications information .............................................................. 30 ? a low channel count application concept using a discrete reference ..................................................................................... 30 ? a dc connected concept example ........................................ 31 ? evaluation board ............................................................................ 34 ? connecting and using the ad8264-evalz .......................... 34 ? outline dimensions ....................................................................... 37 ? ordering guide .......................................................................... 37 ? revision history 1/16rev. a to rev. b changes to features section, general description section, and figure 1 .............................................................................................. 1 changes to figure 2 .......................................................................... 7 changes to vga section ............................................................... 28 updated outline dimensions ....................................................... 37 changes to ordering guide .......................................................... 37 1/11rev. 0 to rev. a changes to figure 1 ........................................................................... 1 changes to connecting and using the ad8264-evalz section and figure 117 ................................................................................ 34 changes to figure 118 ................................................................... 35 5/09revision 0: initial version
data sheet ad8264 rev. b | page 3 of 40 specifications v s = 2.5 v, t a = 25c, f = 10 mhz, c l = 5 pf, r l = 500 per output (vgax, vohx, volx), v gain = (v gnhx ? v gnlo ) = 0 v, v vocm = gnd, v ofsx = gnd, gain range = 6 db to 30 db, unless otherwise specified. table 1. parameter test conditions/comments min typ max unit general performance C3 db small signal bandwidth (vgax) v out = 10 mv p-p 235 mhz C3 db large signal bandwidth (vgax) v out = 1 v p-p 150 mhz C3 db small signal bandwidth (differential output) 1 v out = 100 mv p-p 80 mhz C3 db large signal bandwidth (differential output) 1 v out = 2 v p-p 80 mhz slew rate vgax, v out = 2 v p-p 380 v/s vgax, v out = 1 v p-p 290 v/s differential output, v out = 2 v p-p 470 v/s differential output, v out = 1 v p-p 220 v/s input bias current pins ippx ?8 ?5 ?3 a input resistance pins ippx at dc; v in /i bias 4.2 m input capacitance pins ippx 2 pf input impedance pins ippx at 10 mhz 7.9 k input voltage noise 2.3 nv/hz input current noise 2 pa/hz noise figure (differential output) v gain = 0.7 v, r s = 50 , unterminated 9 db output-referred noise (differential output) v gain = 0.7 v (gain = 30 db) 72 nv/hz v gain = ?0.7 v (gain = 6 db) 45 nv/hz output impedance vgax, dc to 10 mhz 3.5 differential output, dc to 10 mhz <1 output signal range preamp |v s | ? 1.3 v vgax, r l 500 |v s | ? 1.3 v differential amplifier, r l 500 per side |v s | ? 0.5 v output offset voltage preamp offset ?6 |<1| +6 mv vgax offset, v gain = 0.7 v ?18 |<5| +18 mv differential output offset, v gain = 0.7 v ?38 |<10| +38 mv dynamic performance harmonic distortion vgax = 1 v p-p, differential output = 2 v p-p (measured at vgax) hd2 f = 1 mhz ?73 dbc hd3 ?68 dbc hd2 f = 10 mhz ?71 dbc hd3 ?61 dbc hd2 f = 35 mhz ?60 dbc hd3 ?53 dbc vgax = 1 v p-p, differential output = 2 v p-p (measured at differential output) hd2 f = 1 mhz ?78 dbc hd3 ?66 dbc hd2 f = 10 mhz ?71 dbc hd3 ?43 dbc hd2 f = 35 mhz ?56 dbc hd3 ?20 dbc input 1 db compression point v gain = ?0.7 v, f = 10 mhz 7 dbm 2 v gain = +0.7 v, f = 10 mhz ?9.6 dbm
ad8264 data sheet rev. b | page 4 of 40 parameter test conditions/comments min typ max unit two-tone intermodulation distortion (imd3) vgax = 1 v p-p, f 1 = 10 mhz, f 2 = 11 mhz ?68 dbc vgax = 1 v p-p, f 1 = 35 mhz, f 2 = 36 mhz ?51 dbc v out = 2 v p-p, f 1 = 10 mhz, f 2 = 11 mhz ?49 dbc v out = 2 v p-p, f 1 = 35 mhz, f 2 = 36 mhz ?34 dbc output third-order intercept vgax = 1 v p-p, f = 10 mhz 32 dbm 19 dbv rms vgax = 1 v p-p, f = 35 mhz 23 dbm 10 dbv rms v out = 2 v p-p, f = 10 mhz 30 dbm 17 dbv rms v out = 2 v p-p, f = 35 mhz 21 dbm 8 dbv rms overload recovery v gain = 0.7 v, v in stepped from 0.1 v p-p to 1 v p-p 25 ns group delay variation 1 mhz < f < 100 mhz, full gain range 1 ns accuracy absolute gain error 3 ?0.7 v < v gain < ?0.6 v 0 0.2 to 2 3 db ?0.6 v < v gain < ?0.5 v ?1.25 0.35 +1.25 db ?0.5 v < v gain < +0.5 v ?1 0.25 +1 db 0.5 v < v gain < 0.6 v ?1.25 0.35 +1.25 db 0.6 v < v gain < 0.7 v ?3 ?0.2 to ?2 0 db gain law conformance 4 ?0.5 v < v gain < +0.5 v, 2.5 v ? v s ? 5 v 0.2 db ?0.5 v < v gain < +0.5 v, ?40c t a +105c 0.3 db channel-to-channel matching single ic, ?0.5 v < v gain < +0.5 v, ?40c t a +105c ?0.5 0.1 to 0.25 +0.5 db multiple ics, ?0.5 v < v gain < +0.5 v, ?40c t a +105c 0.25 db gain control interface gain scaling factor ?0.5 v < v gain < +0.5 v 19.5 20.0 20.5 db/v over temperature ?40c t a +105c 20 0.5 db/v gain range 24 db gain intercept to vgax 11.5 11.9 12.2 db over temperature ?40c t a +105c 11.9 0.4 db gain intercept to differential output 17.5 17.9 18.2 db over temperature ?40c t a +105c 17.9 0.4 db gnhx input voltage range gnlo = 0 v, no gain foldover ?v s +v s v input resistance v in /i bias , ?0.7 v < v gain < +0.7 v 70 m gnhx input bias current ?0.7 v < v gain < 0.7 v ?0.9 ?0.4 0 a over temperature ?0.7 v < v gain < 0.7 v, ?40c t a +105c ?0.4 +0.2 a gnlo input bias current ?0.7 v < v gain < 0.7 v ?1.2 a over temperature ?0.7 v < v gain < 0.7 v, ?40c t a +105c ?1.2 +0.4 a response time 24 db gain change 200 ns output buffer vocm input bias current 0.3 1.5 2.5 na over temperature ?40c t a +105c 1.5 0.3 na vocm input voltage range ofsx = 0 v, vgax = 0 v ?1.4 +1.4 v gain (vgax to differential output) 5.75 6 6.25 db over temperature ?40c t a +105c 6 0.5 db
data sheet ad8264 rev. b | page 5 of 40 parameter test conditions/comments min typ max unit power supply supply voltage 2.5 5 v power consumption quiescent current v s = 2.5 v 65 79 88 ma v s = 2.5 v, ?40c t a +105c 79 25 ma v s = 3.3 v 70 85 95 ma v s = 3.3 v, ?40c t a +105c 85 30 ma v s = 5 v 81 99 110 ma v s = 5 v, ?40c t a +85c 5 99 30 ma power dissipation v s = 2.5 v 395 mw v s = 3.3 v 560 mw v s = 5 v 990 mw psrr from vpos to differential output, v gain = 0.7 v ?15 db from vneg to differential output, v gain = 0.7 v ?15 db 1 differential output = (vohx ? volx). 2 all dbm values are calculated with 50 reference, unless otherwise noted. 3 conformance to theoretical gain expression (see equation 1 in the theory of operation section). 4 conformance to best-fit db linear curve. 5 for supplies greater than 3.3 v, the operat ing temperature range is limited to ?40c t a +85c.
ad8264 data sheet rev. b | page 6 of 40 absolute maximum ratings table 2. parameter rating voltage supply voltage (vpos, vneg) 6 v input voltage (inpx) vpos, vneg gain voltage (gnhx, gnlo) vpos, vneg power dissipation 2.5 w temperature operating temperature range ?40c to +105c storage temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c package glass transition temperature (t g ) 150c stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. the ja values in table 3 assume a 4-layer jedec standard board with zero airflow. table 3. thermal resistance package type ja jc unit 40-lead lfcsp 1 31.0 2.3 c/w 1 4-layer jedec board (2s2p). maximum power dissipation the maximum safe power dissipation for the ad8264 is limited by the associated rise in junction temperature (t j ) on the die. at approximately 150c, which is the glass transition temperature, the properties of the plastic change. even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. exceeding a temperature of 150c for an extended period can cause changes in silicon devices, potentially resulting in a loss of functionality. esd caution
data sheet ad8264 rev. b | page 7 of 40 pin configuration and fu nction descriptions notes 1. exposed pad (pin 0) needs an electrical connection to ground. for proper rf grounding and increased reliability, the pad must beconnected to the ground plane. pin1 indicator ofs3 vga4 ofs4 vneg vpos vocm gnh3 gnh4 comm ipp4 1 2 3 4 5 6 7 8 9 10 23 24 25 26 27 28 29 30 22 21 1 1 3 3 3 5 3 6 3 7 3 8 3 9 4 0 3 2 3 1 3 4 comm ipp1 gnh1 gnh2 vneg gnlo ofs1 vpos ofs2 vga1 voh3 vga3 vol3 voh1 voh2 vga2 vol2 vol1 vol4 voh4 ipp2 opp3 ipn3 ipp3 ipn2 ipn1 opp1 opp2 ipn4 opp4 ad8264 top view (not to scale) 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 07736-002 figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 0 (ep), 12, 39 comm ground. exposed pad (ep, pin 0) needs an electrical connection to ground. for proper rf grounding and increased reliability, the pad must be connected to the ground plane. 1, 4, 7, 10 ipn1, ipn2, ipn3, ipn4 negative preamp inputs for channel 1 through channel 4. normally, no external connection is needed. 2, 3, 8, 9 opp1, opp2, opp3, opp4 preamp output for channel 1 through channel 4. this pin is internally connected to the attenuator (vga) input, and normally, no external connection is needed. 5, 6, 11, 40 ipp1, ipp2, ipp3, ipp4 positive preamp input for channel 1 through channel 4. high impedance. 13, 14, 37, 38 gnh1, gnh2, gnh3, gnh4 positive gain control voltage input for channel 1 through channel 4. this pin is referenced to gnlo (pin 36). 15 vocm this pin sets the diff erential output amplifier (vohx and volx) common-mode voltage. 16, 35 vpos positive supply (internally tied together). 17, 34 vneg negative supply (internally tied together). 18, 19, 32, 33 ofs1, ofs2, ofs3, ofs4 voltage sets the differential output offset for channel 1 through channel 4. this is the noninverting input to the differential amplifier, and it has the same bandwidth as the inverting input (vgax). 20, 25, 26, 31 vga4, vga3 vga2, vga1 vga output for channel 1 through channel 4. 21, 24, 27, 30 vol1, vol2 vol3, vol4 negative differential amplifier outp ut for channel 1 through channel 4. 22, 23, 28, 29 voh1, voh2, voh3, voh4 positive differential amplifier outp ut for channel 1 through channel 4. 36 gnlo negative gain control input (reference for gnhx pins).
ad8264 data sheet rev. b | page 8 of 40 typical performance characteristics v s = 2.5 v, t a = 25c, f = 10 mhz, c l = 5 pf, r l = 500 per output (vgax, vohx, volx), v gain = (v gnhx ? v gnlo ) = 0 v, v vocm = gnd, v ofsx = gnd, gain range = 6 db to 30 db, unless otherwise specified. ?6 0 6 12 18 24 30 36 ?0.7 ?0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 gain (db) v gain (v) ?40c ?40c +25c +25c +85c +85c +105c +105c 07736-004 vga differential output figure 3. gain vs. v gain vs. temperature ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 ?0.7 ?0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 gain error (db) v gain (v) 07736-005 t a = +105c t a = +25c t a = ?40c max min figure 4. gain error vs. v gain vs. temperature ?4 ?3 ?2 ?1 0 1 2 ?0.7 ?0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 gain error (db) 1mhz 10mhz 70mhz 100mhz 150mhz 07736-006 v gain (v) figure 5. gain error vs. v gain at various frequencies to vgax 07736-007 hits 140 120 100 80 60 40 20 0 ?0.6 ?0.4 ?0.2 0 0.2 0.4 gain error (db) mean: ?0.1db sd: 0.05db v gain = 0v figure 6. vga absolute gain error histogram 07736-008 hits 180 150 120 90 60 30 0 19.0 19.5 20.0 20.5 21.0 gain scaling (db/v) mean: 20.1db sd: 0.09db figure 7. gain scale factor histogram (?0.4 v < v gain < +0.4 v) 07736-009 hits 80 60 40 20 0 11.7 11.8 11.9 12.0 12.1 gain intercept (db) mean: 11.9db sd: 0.08db figure 8. vga gain intercept histogram
data sheet ad8264 rev. b | page 9 of 40 07736-028 hits ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.2 0.50.40.3 0.1 gain error matching (db) 0 100 200 300 400 500 600 700 ch 1 to ch 2 ch 1 to ch 3 ch 1 to ch 4 v gain = 0v figure 9. channel-to-channe l gain match histogram ?18 ?12 ?6 0 6 12 18 24 30 100k 1m 10m 100m gain (db) frequency (hz) v gain = +0.7v p in = ?28dbm v gain = +0.5v v gain = +0.2v v gain = 0v v gain = ?0.2v v gain = ?0.5v v gain = ?0.7v 0 7736-010 figure 10. frequency response vs. gain to vgax for various values of v gain ?40 ?30 ?20 ?10 0 10 20 30 40 gain (db) frequency (hz) 100k 1m 10m 100m v gain = +0.7v v gain = +0.5v v gain = +0.2v v gain = 0v v gain = ?0.2v v gain = ?0.5v v gain = ?0.7v 0 7736-011 p in = ?44dbm figure 11. frequency response vs. gain to differential output for various values of v gain ?40 ?30 ?20 ?10 0 10 20 30 gain (db) frequency (hz) 100k 1m 10m 100m 500m c l = 0pf c l = 10pf c l = 22pf 07736-012 v out = 0.1v p-p figure 12. frequency response to differential output for various capacitive loads ?30 ?20 ?10 0 10 20 30 gain (db) ?40 frequency (hz) 100k 1m 10m 100m 07736-013 v out = 0.1v p-p c l = 0pf c l = 10pf c l = 22pf figure 13. frequency response to differential output for various capacitive loads with series r = 10 ?30 ?20 ?10 0 10 20 gain (db) frequency (hz) 100k 1m 10m 100m 500m c l = 0pf c l = 10pf c l = 22pf c l = 47pf 0 7736-014 v out = 0.1v p-p figure 14. small signal frequency response to vgax for various capacitive loads
ad8264 data sheet rev. b | page 10 of 40 ?30 ?20 ?10 0 10 20 gain (db) frequency (hz) 100k 1m 10m 100m 500m c l = 47pf c l = 22pf c l = 9pf c l = 0pf 07736-015 p in = ?10dbm figure 15. large signal frequency response to vgax for various capacitive loads ?30 ?20 ?10 0 10 20 gain (db) frequency (hz) 100k 1m 10m 100m 500m c l = 0pf c l = 10pf c l = 22pf c l = 47pf 07736-016 p in = ?28dbm figure 16. small signal frequency response to vgax for various capacitive loads with series r = 10 ?30 ?20 ?10 0 10 20 gain (db) frequency (hz) 100k 1m 10m 100m 500m c l = 47pf c l = 22pf c l = 10pf c l = 0pf 07736-017 p in = ?8dbm figure 17. large signal frequency response to vgax for various capacitive loads with series r = 10 gain (db) frequency (hz) ?18 ?12 ?6 0 6 12 18 24 30 100k 1m 10m 100m 500m 07736-018 v out = 0.1v p-p v gain = +0.7v v gain = 0v v gain = ?0.7v v s = 5v v s = 3.3v v s = 2.5v figure 18. small signal frequency response vs. gain to vgax for various supply voltages ?40 ?30 ?20 ?10 0 10 20 30 40 gain (db) frequency (hz) 100k 1m 10m 100m 500m 07736-019 v out = 0.1v p-p v gain = +0.7v v gain = 0v v gain = ?0.7v v s = 5v v s = 3.3v v s = 2.5v figure 19. small signal frequency response vs. gain to differential output for various supply voltages ?6 0 6 12 18 24 30 36 gain (db) frequency (hz) 100k 1m 10m 100m 500m v s = 5v v s = 3.3v v s = 2.5v v s = 5v v s = 3.3v v s = 2.5v 07736-020 v out = 0.1v p-p v gain = 0.7v vga differential output figure 20. large signal frequency response to vgax and differential output for various supply voltages
data sheet ad8264 rev. b | page 11 of 40 gain (db) ?3 ?2 ?1 0 1 frequency (hz) 100k 1m 10m 100m v s = 2.5v, vohx v s = 3.3v, vohx v s = 5v, vohx v s = 2.5v, volx v s = 3.3v, volx v s = 5v, volx 0 7736-021 p in = ?16dbm figure 21. frequency response from vocm to vohx and volx for various supplies ?21 ?15 ?9 ?3 3 9 gain (db) frequency (hz) 100k 1m 10m 100m 500m v s = 5v v s = 3.3v v s = 2.5v 07736-022 v out = 0.1v p-p figure 22. frequency response from ofsx to differential output for various supply voltages ?12 ?6 0 6 12 100k 1m 10m 100m 1g gain (db) frequency (hz) v s = 2.5v v s = 3.3v v s = 5v 07736-023 p in = ?22dbm figure 23. preamp frequency response to oppx 0 1 2 3 4 5 1m 10m 100m del a y (ns) frequency (hz) v gain = ?0.7v v gain = +0.7v v gain = 0v 07736-024 figure 24. group delay vs. frequency to vgax 2 3 4 5 6 7 8 1m 10m 100m del a y (ns) f r e q u e n c y ( h z ) v gain = ? 0 . 7 v v gain = + 0 . 7 v v gain = 0 v 07736-025 figure 25. group delay vs. freq uency to differential output offset voltage rto (mv) ?10 0 10 ?5 15 5 0.7 0.5 0.3 0.1 v gain (v) ?0.1 ?0.3 ?0.5 ?0.7 t a = +105c t a = +25c t a = ?40c max min 07736-026 figure 26. differential output offset voltage vs. v gain vs. temperature
ad8264 data sheet rev. b | page 12 of 40 offset voltage rto (mv) v g a i n ( v ) ?10 0 ?5 10 5 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 0 7736-027 max min t a = +105c t a = +25c t a = ?40c figure 27. vgax output offset voltage vs. v gain vs. temperature 07736-029 hits 0 ?30 ?20 ?10 0 10 30 20 output offset voltage (mv) 3000 2500 2000 1500 1000 500 v gain = ?0.4v v gain = 0v v gain = +0.4v figure 28. output offset histogram to vgax 07736-095 hits ?30 ?20 ?10 0 10 30 20 output offset voltage (mv) v gain = ?0.4v v gain = 0v v gain = +0.4v 0 100 200 300 400 500 600 700 800 figure 29. output offset hist ogram to differential output 0.1 1 10 100 0.1 1 10 100 output resistance ( ? ) frequency (mhz) v s = 2.5v v s = 5v 07736-030 figure 30. output resistance (vohx, volx) vs. frequency 0.1 1 10 100 frequency (mhz) 1 10 output resistance ( ? ) v s = 5v v s = 2.5v 07736-031 figure 31. output resistan ce (vgax) vs. frequency 0 20 40 60 80 100 ?0.7 ?0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 v gain (v) output noise (nv/ hz) vgax differential output 07736-032 figure 32. output referred noise to vgax and differential output vs. v gain
data sheet ad8264 rev. b | page 13 of 40 1 10 100 ?0.7 ?0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 input referred noise (nv/ hz) v gain (v) differential output vgax 07736-033 figure 33. input referred noise from vgax and differential output vs. v gain 1 10 100 100k frequency (hz) 1m 10m 100m 10k 1k 100 1 input referred noise (nv/ hz) 07736-034 vgax differential output figure 34. input referred noise vs. frequency at maximum gain 1 10 100 1k 10k 1 10 100 input referred noise (nv/ hz) r source ( ? ) 07736-035 differential output vgax figure 35. input referred noise vs. r source 5 10 15 20 25 30 35 ?0.7 ?0.5 ?0.3 ?0.1 0.1 0.3 0.5 0.7 noise figure (db) v gain (v) differential output (terminated) differential output (unterminated) vgax (terminated) vgax (unterminated) 07736-036 figure 36. noise figure vs. v gain ?70 ?60 ?50 ?40 ?30 ?20 ? 10 0.1 1 10 100 cmrr (db) frequency (mhz) 07736-037 figure 37. vocm common-mode rejection ratio vs. frequency ? 90 ? 60 ? 50 ? 80 ? 70 hd (dbc) ? 30 ? 40 hd2, v s = 2.5v hd3, v s = 2.5v hd2, v s = 5v hd3, v s = 5v 0 400 800 1200 2000 1600 r load ( ? ) 07736-038 figure 38. harmonic distortion to vgax vs. r load and various supplies
ad8264 data sheet rev. b | page 14 of 40 ? 90 ? 60 ? 50 ? 80 ? 70 hd (dbc) ? 30 ? 40 hd2, v s = 2.5v hd3, v s = 2.5v hd2, v s = 5v hd3, v s = 5v 0 102030 50 40 c load (pf) 07736-039 figure 39. harmonic distortion to vgax vs. c load ? 90 ? 60 ? 50 ? 80 ? 70 hd (dbc) ? 30 ? 40 r load ( ? ) hd2, v s = 2.5v hd3, v s = 2.5v hd2, v s = 5v hd3, v s = 5v 0 400 800 1200 2000 1600 07736-040 figure 40. harmonic distortion to differential output vs. r load and various supplies ? 90 ? 60 ? 50 ? 80 ? 70 hd (dbc) ? 30 ? 40 c load (pf) 50 40 30 20 10 0 hd2, v s = 2.5v hd3, v s = 2.5v 07736-041 figure 41. harmonic distortion to differential output vs. c load ?90 ?60 ?50 ?80 ?70 hd2 (dbc) ? 30 ?40 v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 1mhz 10mhz 35mhz 100mhz 07736-042 figure 42. hd2 vs. v gain vs. frequency to vgax ? 90 ? 60 ? 50 ? 80 ? 70 hd3 (dbc) ? 20 ? 30 ? 40 v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 1mhz 10mhz 35mhz 100mhz 07736-043 figure 43. hd3 vs. v gain vs. frequency to vgax ? 90 ? 60 ? 50 ? 80 ? 70 hd2 (dbc) ? 30 ? 40 v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 vgax = 0.5vp-p vgax = 1vp-p vgax = 2vp-p 07736-044 input limited figure 44. hd2 vs. amplitude to vgax
data sheet ad8264 rev. b | page 15 of 40 ? 90 ? 60 ? 50 ? 80 ? 70 hd3 (dbc) ? 30 ? 40 v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 vgax = 0.5v p-p vgax = 1v p-p vgax = 2v p-p 07736-045 input limited figure 45. hd3 vs. amplitude to vgax ? 90 ? 60 ? 50 ? 80 ? 70 hd2 (dbc) ? 30 ? 40 v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 1mhz 10mhz 35mhz 07736-046 figure 46. hd2 vs. v gain vs. frequency to differential output v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 ? 90 ? 45 ? 30 ? 75 ? 60 0 ? 15 hd3 (dbc) 1mhz 10mhz 35mhz 07736-047 figure 47. hd3 vs. v gain vs. frequency to differential output v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 ? 90 ? 60 ? 50 ? 80 ? 70 ? 30 ? 40 hd2 (dbc) v out = 0.5v p-p v out = 1v p-p v out = 2v p-p 07736-048 figure 48. hd2 vs. amplitude to differential output ? 90 ? 60 ? 50 ? 80 ? 70 v out = 0.5v p-p v out = 1v p-p v out = 2v p-p hd3 (dbc) ? 30 ? 40 v gain (v) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 07736-049 figure 49. hd3 vs. amplitude to differential output 0 10m frequency (hz) 1m 100m imd3 (dbc) low tone, f ? 50khz high tone, f + 50khz ? 20 ? 40 ? 60 ? 80 ? 100 07736-050 v out = 1v p-p figure 50. imd3 vs. frequency to vgax
ad8264 data sheet rev. b | page 16 of 40 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 0 20 40 10 50 30 oip3 (dbm) v gain (v) f = 35mhz, oip3l f = 35mhz, oip3h f = 100mhz, oip3l f = 100mhz, oip3h f = 1mhz, oip3l f = 1mhz, oip3h f = 10mhz, oip3l f = 10mhz, oip3h 07736-051 figure 51. oip3 vs. v gain vs. frequency to vgax 0 10m frequency (hz) 1m 100m imd3 (dbc) high tone, f + 50khz low tone, f ? 50khz ? 20 ? 40 ? 60 ? 80 ? 100 07736-052 v out = 1v p-p figure 52. imd3 vs. frequenc y to differential output 0 20 40 10 50 30 oip3 (dbm) 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 f = 1mhz, oip3l f = 1mhz, oip3h f = 10mhz, oip3l f = 10mhz, oip3h f = 35mhz, oip3l f = 35mhz, oip3h v gain (v) 07736-053 figure 53. oip3 vs. freque ncy to differential output vgax (v s = 5v) diff out (v s = 5v) vgax (v s = 3.3v) diff out (v s = 3.3v) vgax (v s = 2.5v) diff out (v s = 2.5v) v gain (v) input-referred p1db (dbm) ? 15 0 10 ? 10 20 ? 5 15 5 0.7 0.5 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 07736-054 figure 54. input p1db vs. v gain ?0.10 ?0.05 0 0.05 0.10 ?40?200 20406080100 voltage (v) time (ns) 07736-055 v gain = 0.7v figure 55. small signal pulse response to vgax ?40 ?20 0 20 40 60 80 100 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 voltage (v) time (ns) 0 7736-056 v gain = 0.7v figure 56. small signal pulse response to differential output
data sheet ad8264 rev. b | page 17 of 40 ?40 ?20 0 20 40 60 80 100 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 voltage (v) time (ns) 1v p-p 2v p-p 07736-057 v gain = 0.7v figure 57. large signal pulse response to vgax ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 voltage (v) time (ns) 1v p-p 2v p-p 07736-058 ?40 ?20 0 20 40 60 80 100 v gain = 0.7v figure 58. large signal pulse response to differential output ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 0 20 40 60 80 100 120 140 160 voltage (v) time (ns) 2v p-p (v ol ) 2v p-p (v oh ) 1v p-p (v ol ) 1v p-p (v oh ) 07736-059 figure 59. vocm large signal pulse response 1v p-p 2v p-p ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 voltage (v) 07736-060 ?40 ?20 0 20 40 60 80 100 time (ns) figure 60. ofsx large signal pulse response time (ns) ?1.0 ?0.5 0 0.5 1.0 voltage (v) c l = 0pf c l = 10pf c l = 22pf 07736-061 ?40 ?20 0 20 40 60 80 100 v gain = 0.7v figure 61. large signal pulse response to vgax for various capacitive loads voltage (v) ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 time (ns) c l = 0pf c l = 10pf c l = 22pf 07736-062 ?40 ?20 0 20 40 60 80 100 figure 62. large signal pulse response to differential output for various capacitive loads
ad8264 data sheet rev. b | page 18 of 40 07736-096 ?40 ?20 100 80 60 40 20 0 time (ns) ?1.5 ?1.5 ?1.0 ?1.0 ?0.5 ?0.5 0 ?2.0 ? 2.0 vol t age (v) c l = 0pf c l = 10pf c l = 22pf v gain = 0.7v figure 63. large signal pulse response to differential output for various capacitive loads with series r = 10 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 0 400 800 1200 1600 2000 votlage (v) time (ns) v gain pulse gain response 07736-064 figure 64. vgax response to change in v gain ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 0 400 800 1200 1600 2000 votlage (v) time (ns) 0 7736-065 v gain pulse gain response figure 65. differential output response to change in v gain ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 0 200 400 600 800 1000 1200 votlage (v) time (ns) 07736-066 figure 66. preamp overdrive recovery ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 0 200 400 600 800 1000 1200 votlage (v) time (ns) 07736-067 figure 67. vga overdrive recovery 100k 1m 10m 100m psrr (db) frequency (hz) ?10 ?20 ?30 ?40 ?50 ?60 0 vgax (v gain = ? 0.7v) diff out (v gain = ? 0.7v) vgax (v gain = +0.7v) diff out (v gain = +0.7v) 07736-068 figure 68. power supply reje ction vs. frequency (vpos)
data sheet ad8264 rev. b | page 19 of 40 100k 1m 10m 100m psrr (db) frequency (hz) ?5 ?15 ?25 ?35 ?45 ?55 5 vgax (v gain = ? 0.7v) diff out (v gain = ? 0.7v) vgax (v gain = +0.7v) diff out (v gain = +0.7v) 07736-069 figure 69. power supply reje ction vs. frequency (vneg) 55 65 75 85 95 105 115 125 135 ?40 ?15 10 35 60 85 110 supply current (ma) temperature (c) 2.5v 5v 3.3v 07736-070 figure 70. quiescent supply current vs. temperature
ad8264 data sheet rev. b | page 20 of 40 test circuits v s = 2.5 v, t a = 25c, f = 10 mhz, c l = 5 pf, r l = 500 per output (vgax, vohx, volx), v gain = (v gnhx ? v gnlo ) = 0 v, v vocm = gnd, v ofsx = gnd, gain range = 6 db to 30 db, unless otherwise specified. 50 ? pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 oven gnlo dc meter 500 ? 500 ? 500 ? v gain dc meter 07736-119 figure 71. gain vs. v gain vs. temperature (see figure 3 and figure 4) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe differential probe v gain ch1 ch2 50? 50? 50 ? 500? out signal generator oscilloscope 07736-100 figure 72. gain error vs. v gain at various frequencies to vgax (see figure 5) pra 6db + ? 6db + ? vocm ad8264 gnlo 50 ? differential probe v gain ch1 ch2 50? 50? 500? network analyzer 07736-072 ippx ipnx gnhx volx vohx ofsx vgax figure 73. frequency response vs. gain to vgax for various values of v gain , v gain = gnhx C gnlo (see figure 10) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe v gain ch1 ch2 50 ? 50? network analyzer 500 ? 500 ? 07736-101 figure 74. frequency response vs. gain to differential output for various values of v gain (see figure 11) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? differential probe ch1 ch2 50? 50? 500 ? 500? network analyzer c l c l 07736-102 figure 75. frequency response to differential output for various capacitive loads (see figure 12)
data sheet ad8264 rev. b | page 21 of 40 pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? differential probe ch1 ch2 50 ? 50? 500? 500? 10? 10? network analyzer c l c l 0 7736-103 figure 76. frequency response to differential output for various capacitive loads with series r = 10 (see figure 13) pra 6db + ? 6db + ? vocm ad8264 gnlo 50? differential probe v gain ch1 ch2 50? 50? 500 ? c l network analyzer 07736-076 ippx ipnx gnhx volx vohx ofsx vgax figure 77. frequency response to vgax for various capacitive loads (see figure 14) pra 6db + ? 6db + ? vocm ad8264 gnlo 50? differential probe v gain ch1 ch2 50 ? 50? 500? 10? c l network analyze r 07736-077 ippx ipnx gnhx volx vohx ofsx vgax figure 78. frequency response to vgax for various capacitive loads with series r =10 (see figure 16) pra 6db + ? 6db + ? vocm ad8264 gnlo 50? differential probe v gain ch1 ch2 50? 50? network analyze r v s v supply 07736-078 ippx ipnx gnhx volx vohx ofsx vgax figure 79. frequency response vs. gain to vgax for various supply voltages (see figure 18) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? differential probe v gain ch1 ch2 50 ? 50 ? v s v supply network analyzer 500 ? 500 ? 07736-104 figure 80. frequency response vs. gain to differential output for various supply voltages (see figure 19) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe ch1 ch2 50 ? 50? v s v supply network analyzer 500 ? 500? 0 7736-105 figure 81. vocm frequency response to differential output (see figure 21)
ad8264 data sheet rev. b | page 22 of 40 pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? differential probe ch1 ch2 50 ? 50? v s v supply network analyzer 500 ? 500? 0 7736-106 figure 82. ofsx frequency response to differential output (see figure 22) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 oven gnlo dc meter 500? 500? 500? v gain 0 7736-110 figure 83. output offset voltage vs. v gain vs. temperature (see figure 26 and figure 27) pra 6db + ? 6db + ? vocm ad8264 gnlo 50? ch2 ch1 50? 50? network analyze r v s v supply ippx ipnx gnhx volx vohx ofsx vgax 07736-111 figure 84. output resistance vs. frequency (see figure 30 and figure 31) pra 6db + ? 6db + ? vocm ad8264 gnlo ch2 ch1 50? 50 ? spectrum analyzer v gain ippx ipnx gnhx volx vohx ofsx vgax ad8129 10 ad8129 10 07736-112 figure 85. output referred noise vs. v gain (see figure 32) pra 6db + ? 6db + ? vocm ad8264 gnlo ch2 ch1 50? 50 ? 220? spectrum analyzer ippx ipnx gnhx volx vohx ofsx vgax ad8129 10 ad8129 10 50 ? 07736-113 figure 86. input referred noise vs. frequency (see figure 34) pra 6db + ? 6db + ? vocm ad8264 gnlo ippx noise source noise meter 50 ? 50 ? ipnx gnhx volx vohx ofsx vgax v gain 0 7736-115 figure 87. noise figure vs. v gain (see figure 36)
data sheet ad8264 rev. b | page 23 of 40 pra 6db + ? 6db + ? vocm ad8264 gnlo ch2 ch1 50? 50? 220 ? spectrum analyze r ippx r s ipnx gnhx volx vohx ofsx vgax ad8129 10 ad8129 10 50? 50? 0.1f 50 ? 0.1f 1k? 1k? 0.1f 50 ? 0 7736-114 figure 88. input referred noise vs. r source (see figure 35) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? differential probe ch1 ch2 50 ? 50? network analyze r 500 ? 500? 07736-116 figure 89. vocm common-mode rejection vs. frequency (see figure 37) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? ch1 50? 50 ? 500? v s v supply out signal generator lpf 07736-117 spectrum analyze r figure 90. test circuit harmonic distortion to vgax vs. r load and various supplies (see figure 38) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? ch1 c l 50? 50? 10? out signal generator spectrum analyzer lpf 07736-118 figure 91. harmonic distortion to vgax vs. c load (figure 39) r l r l 07736-128 ad8130 1 pra 6db + ? 6db + ? vocm ad8264 gnlo 50 ? ch1 50 ? 50? 450 ? out signal generator ippx ipnx gnhx volx vohx ofsx vgax spectrum analyzer lpf v supply v s figure 92. harmonic distortion to differential output vs. r load and various supplies (see figure 40)
ad8264 data sheet rev. b | page 24 of 40 07736-129 ad8130 1 10 ? c l c l 10? pra 6db + ? 6db + ? vocm ad8264 gnlo 50 ? ch1 50? 50 ? 450 ? out signal generator ippx ipnx gnhx volx vohx ofsx vgax spectrum analyzer lpf figure 93. harmonic distortion to differential output vs. c load (see figure 41) pra 6db + ? 6db + ? vocm ad8264 gnlo 50 ? v gain ch1 50 ? 50 ? 450? out signal generator 07736-130 ippx ipnx gnhx volx vohx ofsx vgax spectrum analyze r lpf figure 94. hd2 and hd3 to vgax (see figure 42 through figure 45) 0 7736-131 ad8130 1 pra 6db + ? 6db + ? vocm ad8264 gnlo 50? ch1 50? 50? 350? out signal generator ippx ipnx gnhx volx vohx ofsx vgax spectrum analyzer lpf v gain v s figure 95. hd2 and hd3 to differential output (see figure 46 through figure 49) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx out ofsx vocm vgax ad8264 gnlo 50? 50? 50? signal generator out 50? signal generator 0 7736-132 ch1 50? 450? spectrum analyzer v gain figure 96. imd3 and oip3 to vgax (see figure 50 and figure 51) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx out ofsx vocm vgax ad8264 gnlo 50? 50? 50? signal generator out 50? signal generator 07736-133 500 ? 500 ? ad8130 1 ch1 50? 10 ? 10 ? 450 ? spectrum analyze r figure 97. imd3 and oip3 to differential output (see figure 52 and figure 53)
data sheet ad8264 rev. b | page 25 of 40 pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe ch2 ch3 50 ? 50 ? ch1 50 ? network analyze r 07736-134 500 ? 500 ? v gain 500? figure 98. input p1db vs. v gain (see figure 54) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe differential probe ch1 ch2 50? 50? 50? 500 ? out pulse generator oscilloscope 07736-135 figure 99. pulse response to vgax, v gain = 0.7 v (see figure 55 and figure 57) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe differential probe ch1 ch2 50? 50 ? 50? out pulse generator oscilloscope 07736-136 500 ? 500 ? figure 100. pulse response to differential outputs, v gain = 0.7 v (see figure 56 and figure 58) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx out ofsx vocm vgax ad8264 gnlo 50? differential probe ch1 50? oscilloscope 500 ? 500? 50? pulse generator 50? 07736-120 figure 101. vocm pulse response (see figure 59) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx out ofsx vocm vgax ad8264 gnlo 50? differential probe ch1 50? oscilloscope 50 ? pulse generator 50 ? 07736-121 figure 102. ofsx pulse re sponse (see figure 60) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? ch1 c l 50? 50? out pulse generator 500 ? oscilloscope differential probe 07736-122 figure 103. pulse response to vgax for various capacitive loads, v gain = 0.7 v (see figure 61)
ad8264 data sheet rev. b | page 26 of 40 pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50? ch1 c l 50 ? 50? out pulse generator 500 ? oscilloscope differential probe c l 500 ? 07736-123 figure 104. pulse response to differential output for various capacitive loads, v gain = 0.7 v (see figure 62) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? ch1 c l 50? 50? out pulse generator 500? 10? oscilloscope differential probe c l 500? 10 ? 07736-124 figure 105. pulse response to differential output for various capacitive loads with series r = 10 , v gain = 0.7 v (see figure 63) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx out ofsx vocm vgax ad8264 gnlo 50? differential probe ch2 ch1 50? 50? oscilloscope 500? 500 ? 500? 50 ? 50? out signal generator pulse generator 07736-125 figure 106. gain response to vgax or differential output (see figure 64 and figure 65) pra 6db + ? 6db + ? ippx oppx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo differential probe ch1 50? oscilloscope 50? 50 ? out signal generator 07736-126 figure 107. preamp overdrive recovery (see figure 66) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo differential probe ch1 50? oscilloscope 50 ? 50? out signal generator 07736-127 figure 108. vga overdrive recovery, v gain = 0.7 v (see figure 67)
data sheet ad8264 rev. b | page 27 of 40 pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax ad8264 gnlo 50 ? differential probe v gain ch1 ch3 ch2 50? 50 ? 50 ? v s v supply oscilloscope 500 ? 500 ? 500? 07736-108 figure 109. psrr (see figure 68 and figure 69) pra 6db + ? 6db + ? ippx ipnx gnhx volx vohx ofsx vocm vgax vneg vpos ad8264 gnlo 50? dmm (?1) dmm (+1) 07736-109 figure 110. quiescent supply current (see figure 70)
ad8264 data sheet rev. b | page 28 of 40 theory of operation overview the ad8264 is a dc-coupled quad channel vga with a fixed gain-of-2 (6 db) preamplifier and a single-ended-to-differential output amplifier with level shift capability that can be used as an adc driver. figure 111 shows a representative block diagram of a single channel; all four channels are identical. the supply can operate from 2.5 v to 5 v. the primary application is as a pulse processor for medical positron emission tomography (pet) imaging; however, the device is useful for any dc-coupled application that can benefit from variable gain. the signal chain consists of three fundamental stages: the preamplifier, the variable gain amplifier, and the differential output buffer amplifier. the preamplifier has an internally fixed gain-of-2 (6 db). the vga comprises an attenuator that provides 0 db to 24 db of attenuation, followed by a fixed gain 18 db (8) amplifier. the single -ended vga output is connected directly to the noninverting input of the differential output (post) amplifier, which has a differential fixed gain-of-2 (6 db). the gain range from the preamp input to the vga output is 0 db to 24 db. the aggregate gain range from preamp input to the differential postamplifier output is 6 db to 30 db. the ideal gain equation for the gain from the single-ended input to the output is v gain = v gnhx ? v gnlo (1) icpt v gain gain ??? v db 20 (2) the ideal value for icpt, or the intercept, is defined at v gain = 0 v. the icpt for the vga output and differential amplifier outputs equals 12.1 db and 18.1 db, respectively. the actual intercept varies with any additional gain or loss along the signal path. the measured values are both approximately 0.2 db low. preamp the preamplifier is a current feedback amplifier, designed to drive the internal 100 gain setting resistors and the resistive attenuator, which together result in a nominal load to the preamplifier of about 113 . normally, the negative preamp input, ipnx, is not connected externally. the positive input ippx is the high impedance input of the current feedback amp. note that, at the largest supply voltage of 5 v, the input signal can become so large that the preamplifier output cannot deliver the required current to drive the 113 load and, therefore, limits at 6 v p-p. this means that the input limits at 3 v p-p. the short-circuit input referred noise at maximum vga gain is about 2.3 nv/ ? hz, and this accounts for all of the amplifiers and gain setting resistors. when measuring the input referred noise from the vga output, the number is slightly lower at 2.1 nv/ ? hz because the noise of the post-amplifier is not included in the noise calculation. vga the vga has a voltage feedback architecture and uses analog control to vary the gain. its low gain range helps to maintain low offset and is intended for gain trim applications. the offset of the preamp and the vga are trimmed; therefore, the maximum input referred offset is <0.5 mv over temperature (see figure 26). keeping the gain of each stage relatively low also allows the bandwidth to stay high. the gain of the vga is adjusted using the fully differential control inputs, gnhx and gnlo. the gnlo pin is internally connected to all four channels and must be biased externally. under typical conditions, the gnlo pin is grounded. the gain high control pins (gnhx) are independent for each channel. the gain slope is nominally 20 db/v. with gnlo connected to ground, each gnhx input can have a voltage applied from vneg to vpos without gain foldover. to make use of the full gain range of the vga, the nominal gain control voltage needed at gnhx is 0.65 v relative to the voltage applied to gnlo. at the lowest supply voltage of 2.5 v, the gnlo pin must always be grounded. with increasing supply, the common-mode range of the gain control interface increases. this means that gnlo can be anywhere within ? 1.2 v at ? 3.3 v supplies and ? 2.8 v at 5 v supplies. table 5. gain control input range supply voltage (v) gnlo voltage range (v) v gain range (v) 5 2.8 0.65 3.3 1.2 0.65 2.5 0 0.65 for example, with a 3.3 v supply, the outputs of a quad, single- supply dac, such as the 10-bit, ad5314 , drive the gnhx pins directly. the output current rating of a low voltage adr4520 ldo reference (2.048 v) is more than adequate to drive the refhi pin of the ad5314 plus a 2:1, 10 k resistive voltage divider between the v out pin and the gnd pin. connect the center tap of the divider (v ref /2) to the gnlo pin of the ad8264.
data sheet ad8264 rev. b | page 29 of 40 ippx vpos ipnx volx vohx interpolator preamp 6db (2) ofsx oppx gain interface 100 ? 747 ? 107 ? 100 ? + ? vocm comm gnhx gnlo bias vneg noninverting amplifier input inverting amplifie r input (not used) power supplies vgax single-ended hs vga output differential vga output offset adjust output common-mode voltage adjustment differential gain control inputs 1.2v p-p max @ 2.5v 2v p-p max @ 3.5v to 3.3v 3v p-p max@ 5v (preamp drive limited) 2.3nv/ hz differential output never limits because vga limits first. differential output swing = 2x vga out 5.2v p-p max @ 2.5v 8v p-p max @ 3.5v to 3.3v 15v p-p max @ 5v 73nv/ hz preamp output (not used) 2.6v p-p max @ 2.5v 4v p-p max @ 3.5v to 3.3v 7.5v p-p max @ 5v 34nv/ hz composite gain is +6db to +30db attenuator ?24db to 0db fixed gain vga amplifier 18db (8) differential output amplifier 6db (2) 1k ? 2k ? 1k? 2k ? 1 1 2 2 3 3 0 7736-081 figure 111. single-cha nnel block diagram post amplifier from the preamp input to the vga output (vgax), the gain is noninverting. as can be seen in figure 111, the vgax pins drive the positive input of the differential amplifier. the gain is inverting from the input of the preamp to the output pin at volx, and the gain is noninverting to the output vohx. other than the input from vgax, each differential amplifier has two additional inputs: vocm and ofsx. a common vocm pin is shared among all four postamplifiers, while separate ofsx pins are provided for each channel. vocm pin the vocm pin sets the common-mode voltage of the differential output and must be biased by an external voltage. when driving a dc-coupled adc, the voltage typically comes from the adc reference, as shown in the applications information section. if dc level shift is not necessary, the vocm pin is connected to ground. ofsx pins the ofsx pins are the inverting inputs of the differential post amplifiers and can be used to prebias a differential dc offset at the output. this is very useful when the input is a unipolar pulse because the user can set up the gain and the offset in such a way as to optimally map a unipolar pulse into the full-scale input of an adc, while dc coupling throughout. if dc offset is not desired, then connect the ofsx pins to ground. however, the ofsx pins can also be used as separate inputs if the user wants this function. noise at maximum gain, the preamplifier is the primary contributor of noise and results in a differential output referred noise of roughly 73 nv/ hz. the noise at the vgax outputs is 34 nv/ hz, and because of the gain-of-2, the vga output noise is amplified by 6 db to 68 nv/ hz. the differential amplifier, including the gain setting resistors, contributes another 26 nv/ hz, and the rms sum results in a total noise of 73 nv/ hz. at the lowest gain, the noise at the vga output is approximately 19 nv/ hz, and when multiplied by two, it results in 38 nv/ hz at the differential output; again, rms summing this with the 26 nv/ hz of the differential amplifier causes the total output referred noise to be approximately 46 nv/ hz. the input referred noise to the preamplifier at maximum gain is 2.3 nv/ hz and increases with decreasing gain. note that all noise numbers include the necessary gain setting resistors.
ad8264 data sheet rev. b | page 30 of 40 applications information a low channel count application concept using a discrete reference the ad8264 is particularly well suited for use in the analog front end of medical pet imaging systems. figure 112 shows how to use the ad8264 with the ad5314 (a 4-channel, 10-bit dac) and the ad9222/ ad9228 (an octal or quad, 12-bit adc, respectively). the dac sets the gain of the ad8264 . note that the full gain span of 24 db is achieved with this setup because the gain control input range of the ad8264 is very close to 1.25 v. the gnlo pin must offset by 1.25/2 = 625 mv because the gain control input is bipolar around the voltage applied at gnlo. this is done with two 1 k, 1% resistors. the approximately 1 a of bias current flowing from the gnlo pin does not contribute a significant error because the basic gain error of the ad8264 is the limiting factor. the adr127 1.25 v precision reference with an input of 3.3 v can supply ?2 ma to +5 ma from ?40c to +125c, which is sufficient to drive both the resistive divider and the refin pin of the ad5314 . the ad5314 is based on the string dac concept, which means that the refin pin looks like a resistor that is nominally 45 k; this results in a current draw of 1.25 v/45 k = 28 a. even at the lowest specified resistance of 37 k, this is still only a current of 34 a. therefore, the total current draw from the adr127 is the 625 a of the resistive divider plus ~30 a, which equals ~655 a, well belo w the 5 ma maximum current. figure 112 also includes the dac output equation, which indicates that the output can vary between 0 v and vref = 1.25 v. the output of the ad8264 is ideal to drive an adc like the 1.8 v quad-channel ad9228 . if eight channels are needed, two ad8264 s with the octal ad9222 adc achieve the same thing. the same resistive divider can be used for two ad8264 s because the bias current flowing is now ~2 a, but this still only introduces an error of 1 mv with ideally matched resistors. with 20 db/v gain scaling, this is a gain error of only 0.02 db, which is much smaller than the fundamental gain error of the ad8264 (typically ~0.2 db). the single-ended-to-differential amplifier of the ad8264 amplifies the vga output signal by 6 db and can provide the required dc bias of the ad9222/ ad9228 , as shown in figure 112. the adc is connected with the default internal reference because the sense pin is grounded. with this connection, the ad9222/ ad9228 vref pin is an output that provides 1 v; this is then connected to the vocm input of the ad8264 , which sets the output common-mode voltage of the vohx and volx pins to 1 v. this voltage is very close to the recommended optimal value of vdd/2 = 0.9 v. with this configuration, the adc inputs are set to a full-scale (fs) of 2 v p-p. note that it is not recommended for the adc vref to drive many loads; therefore, for multiple ad8264 s, buffer the vref. +3.3v ?3.3v 0.1f nc 6 nc 5 v out 4 1 2 3 nc gnd v in adr127 refin v out a v out b v out c v out d dac ad5314 gnd v refin d v out 2 n = 10f 10f 1k ? 1% 1k ? 1% 1.25v 625mv gnh1 gnh2 gnh3 gnh4 ad8264 gnlo v out range = 0v to 1.25v each vocm vohx volx v dd r filt r filt c filt adc ad9222/ ad9228 vref vdd +1.8v sense gnd v in ? x v in + x sense grounded: vref = 1v vneg vpos ippx r s r term ofsx ~250na each vgax vga outputs to other signal processing output common-mode voltage = 1v vohx = 1v, volx = 1v; vofs = 0v fs = 2v p-p 625a 1f 0.1f 0.1f ~1a +3.3v +3.3v 07736-082 figure 112. application concept of the ad8264 with the ad5314 10-bit dac and the ad9222 / ad9228 12-bit adc
data sheet ad8264 rev. b | page 31 of 40 a dc connected concept example the dc connected concept example in figure 113 is an application with the 40-channel ad5381 , 3 v, 12-bit dac. the main difference between this example and figure 112 is that, for the same adr127 1.25 v reference, the full-scale output of the dac is from 0 v to 2 vrefin = 2.5 v. two options for gain control include the following: ? use the same circuit as in figure 112 but use only half the dac output voltage from 0 v to 1.25 v. this is the simplest solution, requiring the fewest extra components. note that the overall gain resolution increases by one bit to 11 bits over the 10-bit ad5314. ? ground gnlo and scale the dac output so that the gnhx inputs vary from ?0.652 v to +0.625 v. figure 113 shows a possible circuit implementation using a divider between the dac output and a ?1.25 v reference. gnlo cannot simply be increased to 1.25 v because, for a given supply voltage, gnlo has a limited voltage range to achieve the full gain span (see table 5). however, a third possibility is to use another voltage that is between 1.2 v and 625 mv on gnlo, such as 1 v. in this case, the dac must vary from 0.375 v to 1.625 v to achieve the fully specified gain range. note the gain limits when the differential gain control exceeds 0.625 v, either to 6 db or to 30 db. if the differential gain control input voltage is exceeded, no gain foldover occurs. figure 113 shows how the ad8264 is connected in a pet application. the pmt generates a negative-going current pulse that results in a voltage pulse at the preamplifier input and a differential output pulse on volx and vohx. to fully appreciate the advantages of the ad8264 , note the common-mode and polarity conversion afforded. the ad9228 , as with most modern adcs, is a low voltage, single-polarity device. recall that the pmt is a high voltage device that yields a negative pulse. to map the pulse to the input range of the adc, the pulse must be inverted, shifted, and amplified to the full input range of the adc. this is done by using the gain control, signal offset, and common-mode features of the ad8264. the full-scale input of the converter is 0 v to 2 v, with a common- mode of 1 v. match the vocm voltage of the ad8264 to the adc common mode (vref = 1 v), and the two devices can be connected directly using an appropriate level of the antialiasing filter. the pmt signal is 0 v to ?0.1 v. with a gain of 20 (26 db), the ad8264 output signal range is 2 v p-p. prebias the signal negative by ?0.5 v using the ad8264 ofsx inputs, which sets vohx = 1.5 v and volx = 0.5 v for vocm = 1 v. the output is perfectly matched to the input of the adc. note that, by connecting volx to the positive adc input and vohx to the negative adc input, the negative input pulse is inverted automatically. the vgax output is still a negative pulse, amplified by 20 db for this example. +3.3v ?3.3v 0.1f nc 6 nc 5 v out 4 1 2 3 nc gnd v in a dr127 refin v out a v out b v out c v out d dac ad5314 gnd v refin d v out 2 n = 10f 10f 1k 1% 1k 1% 1.25v 625mv gnh1 gnh2 gnh3 gnh4 ad8264 gnlo v out range = 0v to 1.25v each vocm vohx volx v dd r filt r filt c filt adc ad9222/ ad9228 vref vdd +1.8v sense gnd v in ? x v in + x sense grounded: vref = 1v vneg vpos ippx r s r term ofsx ~250na each vgax vga outputs to other signal processing output common-mode voltage = 1v vohx = 1v, volx = 1v; vofs = 0v fs = 2v p-p 625a 1f 0.1f 0.1f ~1a +3.3v +3.3v 07736-082 figure 113. concept application of ad8264 with 40-channel ad5381 12-bit, 3 v dac and ad9222 / ad9228 12-bit adc
ad8264 data sheet rev. b | page 32 of 40 inx agndx avddx dvdd dgnd gnh1 gnh2 gnh3 gnh4 vneg vocm vohx volx gnlo vpos ippx ofsx vgax adc ad9228 eval kit vpos vref pulse generator voltage (v) 1.0 0.8 0.6 0.4 0.2 0 ?0.2 ?0.4 ?0.6 ?0.8 ?1.0 0 50 100 150 samples 200 250 300 usb refin (on board) input examples usb 2.0 to pc adi visual analog analysis software ?inx +inx to switching power supply +3.3v +3.3v ?3.3v +2.5v vout0 vout1 vout3 vout4 vout39 v out range = 0v to 1.25v each ad8264 vga eval board dac ad5380 eval board to 9 other ad8264s gnlo = 625mv vocm = 1.0v ofsx = ? 0.5v +1.0v vga outputs to other signal processing 0v ?0.1v 07736-084 eval-sdp-cb1z figure 114. evaluation setup for dc-coupled analog front-end pulse processing application using the ad8264 07736-215 figure 115. ad5381 evaluation software ad5381 option selected. a convenient method of verifying and customizing the signal chains shown in figure 112 and figure 113 is by ordering the corresponding evaluation boards available on www.analog.com . the ad8264-evalz is a platform through which the user can quickly become familiar with the features and performance capabilities of the ad8264 . see the evaluation board section for more information. when configuring evaluation boards around the ad8264-evalz , always be certain to refer to the latest revision of the ad5381 and/or ad9228 data sheets for hardware revisions or updates. the eval-ad5380sdpz (a 40-channel dac) connects to the eval-sdp-cb1z and includes a software evaluation program to control the dac. the ad5380 evaluation software allows the user to configure and program dac parameters such as input codes, offset level, and output range, based on a 2.5 v or 1.25 v reference. for example, as shown in figure 114, the reference can be set to 1.25 v, with a 0 v to 1.25 v output range to drive the gnhx inputs. for dac user application information, refer to ug-757. the adc evaluation kit includes the ad9228-65ebz board and the hsc-adc-fifo5 board to decode the adc output. the kit also leverages the capabilities of visualanalog?, powerful sim- ulation and data analysis software that enables the user to run ffts and to perform real-time capture of the output levels.
data sheet ad8264 rev. b | page 33 of 40 inx agndx avddx dvdd dgnd gnh1 gnh2 gnh3 gnh4 vneg vocm vohx volx gnlo vpos ippx ofsx vgax adc ad9228 eval kit vpos vref ac source ?15 0 ?30 ?45 ?60 ?75 ?90 ?105 ?120 ?135 ?150 1.5m 3.0m 4.5m 6.0m 7.5m 9.0m 10.5m refin (on board) input examples usb 2.0 to pc adi visual analog analysis software ?inx +inx t o switching power supply +3.3v +3.3v +3.3v ?3.3v +2.5v v out0 v out1 v out3 v out4 v out39 v out range = 0v to 1.25v each ad8264 vga eval board dac ad5380 eval board to 9 other ad8264s gnlo = 625mv vocm = 1.0v +1.0v vga outputs to other signal processing 4 2 + 3 07736-086 12-18-15 usb eval-sdp -cb1z figure 116. evaluation setup for ac signal processing application using the ad8264
ad8264 data sheet rev. b | page 34 of 40 evaluation board analog devices, inc. provides ev aluation boards to customers as a support service so that the circuit designer can become familiar with the device in the most efficient way possible. the ad8264 evaluation board provides a fast, easy, and convenient means to assess the performance of the ad8264 before going through the hassle and expense of design and layout of a custom board. the board is shipped fully assembled and tested, and it provides basic functionality as shipped. standard connectors enable the user to attach standard lab test equipment without having to wait for the rest of the design to be completed. figure 117 shows a digital image of the top view, and figure 118 shows the schematic diagram of the ad8264 evaluation board. the printed circuit board (pcb) artwork for all conductor and silkscreen layers is shown in figure 119 to figure 124. a descrip- tion of a typical test setup can be found in the applications information section. the pcb artwork can be used as a guide for circuit layout and placement of devices. this is particularly useful for multiple function circuits with many pins, requiring multiple passive components. connecting and using the ad8264-evalz the ad8264 operates with bipolar power supplies from 2.5 v dc to 5 v dc. make sure the current capacity is 400 ma. connect a ground reference from the supplies to any of the black test loops, the positive supply to the red test loop (+v), and the negative supply to the blue test loop (?v). notice that the board is shipped with jumpers installed on the 2-pin headers marked gn1_2, gn3_4, ofs_12, ofs_34, gnlo, and vocm. if these jumpers are missing, the offset and common- mode functions float high, substantially increasing the quiescent current of the board. apply input signals to any of the preamps at the sma connectors, in1 through in4. these connectors are terminated with 50 to accommodate typical signal generator analyzer voltage source impedances. the gain of the ad8264 preamps is fixed at 6 db (2) and can be monitored at the sma connectors, op1_2 and op3_4, if desired. note that there are output selector switches for each pair of preamps and 453 resistors in series with the preamp outputs. 07736-087 figure 117. digital image of the ad8264-evalz (top view)
data sheet ad8264 rev. b | page 35 of 40 + v +v ipn1 opp1 opp2 ipn2 ipp2 ipp3 ipn3 opp3 ipp4 comm gnh4 gnh3 vocm vpos vneg ofs4 ipp1 comm gnh1 gnh2 gnlo vpos vneg ofs1 vol1 voh1 voh2 vol2 vga2 vga3 vol3 voh3 opp4 voh4 ipn4 vol4 ofs3 vga4 ofs2 vga1 ?v ?v ofs12 ofs34 gnlo vocm g n1_2 pin 0 exposed paddle in3 op1_2 12 c23 0.1f 15 2019 18 17 16 14 13 r17 dni r16 dni r28 dni l3 fb l4 fb in4 11 l1 fb vpos 21 30 29 28 27 26 25 24 23 22 v g a 2 vga3 vga4 vga1 39 36 31 32 33 34 35 3738 40 r11 49.9 ? r10 dni + + r9 dni op3_4 10 1 2 3 4 5 6 7 8 9 r19 dni r29 dni in2 r73 0 ? r23 dni r31 dni opp12 opp34 vo_cm vout_3 vout_4 vout_2 vout_1 ofs_12 gn1_2 gnd2 gnd3 gnd4 gnd5 gnd6 gnd1 +v ?v in_4 in_3 in_2 op34 op12 gn3_4 gn34 vga_4 vga3 vga2 vga_1 c19 0.1f c20 0.1f c34 10f c33 10f l2 fb opp_3 opp_4 opp_2 opp_1 c24 0.1f ofs_34 r32 dni r49 0 ? r86 0 ? r47 0 ? r48 0 ? r51 0 ? in_1 r1 453 ? in1 r7 453? r22 dni r45 49.9 ? r46 49.9 ? r6 453? r25 dni r20 dni r78 0 ? r72 0 ? r17 49.9 ? c22 0.1f c21 0.1f r80 0 ? r79 0 ? r70 0 ? r71 0 ? r8 453? r64 0 ? r63 0 ? r65 0 ? r66 0 ? r67 453? r69 453? r57 0 ? r58 0 ? r56 0 ? r55 0 ? 07736-088 pin 0: exposed paddle r24 dni figure 118. ad8264-evalz schematic the sma connectors, vga1 through vga4, enable signal monitoring at these nodes, with 453 resistors for protecting the device. these resistors can be shorted at the discretion of the user if wide bandwidth is desired. the differential outputs are provided with 0.1 spacing 2-pin headers, which fit the low capacitance tektronix differential scope probe p6045 model. note that the gain control input of the ad8264 is differential. each channel has its own gain control pin (gnhx); however, pairs of pins are connected together on the evaluation board and connected to a test loop. the 2-pin headers are provided for jumpers to connect the gain pins to ground, preventing the quiescent gain control voltage at the gnhx pins from floating high. the low sides of the gain controls for each channel are internally connected in the ad8264 , and a 2-pin header with jumper is provided to connect this pin (gnlo) to ground as well. a similar arrangement of 2-pin headers is provided for the output offset voltage. as shipped, the offset pins are connected to ground, preventing the pins from floating high. for connecting to an adc, remove the jumpers at the of1_2 and of3_4 headers and connect the appropriate offset voltage at the test loops, of12 and of34. if the vocm pin is buffered, it can be connected to the reference of the adc.
ad8264 data sheet rev. b | page 36 of 40 07736-089 figure 119. component side assembly 07736-090 figure 120. component side copper 07736-091 figure 121. component side silk screen 0 7736-092 figure 122. secondary side copper 07736-093 figure 123. ground plane 07736-094 figure 124. power plane
data sheet ad8264 rev. b | page 37 of 40 outline dimensions 0.50 bsc bottom view top view pin 1 indicator exposed pad p i n 1 i n d i c a t o r seating plane 0.05 max 0.02 nom 0.20 ref coplanarity 0.08 0.30 0.25 0.18 6.10 6.00 sq 5.90 0.80 0.75 0.70 0.45 0.40 0.35 0.25 min 4.25 4.10 sq 3.95 compliant to jedec standards mo-220-wjjd. 40 1 11 20 21 30 31 10 05-06-2011-a figure 125. 40-lead lead frame chip scale package [lfcsp] 6 mm 6 mm body and 0.75 mm package height (cp-40-9) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ad8264acpz ?40c to +85c 40-lead lfcsp cp-40-9 h1v ad8264acpz-r7 ?40c to +85c 40-lead lfcsp, 7 tape and reel cp-40-9 h1v ad8264acpz-rl ?40c to +85c 40-lead lfcsp, 13 tape and reel cp-40-9 h1v ad8264-evalz evaluation board 1 z = rohs compliant part.
ad8264 data sheet rev. b | page 38 of 40 notes
data sheet ad8264 rev. b | page 39 of 40 notes
ad8264 data sheet rev. b | page 40 of 40 notes ?2009C2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07736-0-1/16(b)

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